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- Credits:
3.0
- Lecture
hours: Tuesday & Thursday, 11am - 12:15pm, SEM 234
- Lab
hours:
- Section
1: Monday, 6-9pm, SEM 340
- Section
2: Wednesday, 2-5pm, SEM 340
- Section
3: Wednesday, 6-9pm, SEM 340
- More
information about the labs is available at the lab website.
E-mail: yuksem@cse.unr.edu
Phone: (775) 327-2246
Web page: http://www.cse.unr.edu/~yuksem
Office: SEM 237 (Scrugham
Engineering-Mines)
Office hours:
- Tuesday,
1-3pm
- Wednesday,
11am-2pm
- Thursday,
1-3pm
- or
by appointment
- Teaching
Assistant: Suat Mercan
E-mail: smercan@cse.unr.edu
Phone: TBA
Web page: http://www.cse.unr.edu/~smercan
Office: SEM 323 A
Office hours:
- Monday,
12-1:30pm
- Wednesday,
12-1:30pm
- or
by appointment
Fundamentals of digital design. Topics include: number bases, binary
arithmetic, Boolean logic, minimizations, combinational and sequential
circuits, registers, counters, memory, programmable logic devices, register
transfer.
- CS
135 with a “C” or better. (BS-EE students are exempt from the “C”
requirement.)
Required Textbooks
- M.
M. Mano and M. D. Ciletti. (2007) Digital
Design, 4th Edition. Prentice Hall. (ISBN: 0-13-198924-3)
Recommended Textbooks
This is a tentative list of topics, subject to modification and
reorganization.
- Digital Systems and Binary Numbers
- Number representation systems and conversion
- Binary numbers and arithmetic
- Boolean logic
- Boolean Algebra and Logic Gates
- Boolean functions and operations
- Axiomatic expression of Boolean logic
- DeMorgan’s theorem
- Logic gates
- Minimization and minterms
- Gate-Level Minimization
§
The Map method
§
Products-of-Sums
- Don’t care conditions
- NAND and NOR gates
- Combinational Logic
- Analysis and design of logic circuits
- Decoders
- Encoders
- Multiplexers
- Synchronous Sequential Logic
- Sequential circuits
- Storage components
§
Latches
§
Flip-Flops
- Clocked circuits
- State reduction
- Registers and Counters
- Shift registers
- Synchronous counters
- Design at the Register Transfer Level (RTL)
- RTL notation
- HDL
- Algorithmic State Machines (ASMs)
- Controller and datapath design
- Computer Design Basics
- Datapaths
- ALU
- Control word
- Instruction formats and specifications
- Instruction Set Architecture
- Register file
- Instructions and operand processing
- Addressing modes
- Data transfer instructions
- Data manipulation instructions
- WebCT
Except this web page, all course materials will be posted at the WebCT.
- Labs
There will be weekly lab sessions where you will have hands-on experience
of the logic design concepts. The labs schedule and materials are
available through the lab
website.
- Quizzes
There will be a few in-class quizzes. Exact date for some of these
quizzes will not be exposed beforehand. These quizzes will be extremely
time-constrained, i.e., 15-30mins.
- Homework
There will be homework assignments approximately one in every three
weeks. The one with the lowest grade will not affect your overall grade.
- Late policy
Late assignments will be penalized according to the sliding
scale below. If I am not available, slide your assignment under my
office door or simply email it to me as a softcopy.
- Exams There will be one midterm
exam and one final exam (see Schedule for
tentative dates).
- Academic
Integrity There will be no team projects or reports in
this class, therefore all assignments and exams must be prepared
strictly individually.
Any form of cheating such as plagiarism or ghostwriting will incur a
severe penalty, usually failure in the course. Please refer to the UNR policy on Academic
Standards.
- Disability
Statement If you have a disability for which you will
need to request accommodations, please contact the instructor or someone
at the Disability Resource Center (Thompson Student Services - 107) as
soon as possible.
Both grading policy and scale are subject to change.
|
• Grading Policy
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Labs
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20%
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Quizzes
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15%
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Homework
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15%
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Midterm Exam
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25%
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Final Exam
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25%
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• Late Assignment Policy
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less than 1 day late
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25% deducted
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between 1 and 2 days late
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50% deducted
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over 2 days late
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100% deducted
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• Grading Scale (Tentative)
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90% - 100%
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A-, A
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80% - 89%
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B-, B, B+
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65% - 79%
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C-, C, C+
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55% - 64%
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D
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0% - 54%
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F
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Note: Saturdays and Sundays do not count toward missed days. For example,
there is 1 "day" between Friday, 2pm and Monday, 2pm. Similarly,
there is 1 day between Monday, 2pm and Tuesday, 2pm.
Important
Note: Re-grading requests can only be made within the first week
after the graded assignments/tests are returned to the students.
This is a tentative schedule including the exam dates. It is subject to
readjustment depending on the time we actually spend in class covering the
topics. Slides presented in class and assignments will be posted at the WebCT. See the acknowledgment
for the course materials. Permanent reading assignment: it is
assumed that
you
are
familiar with the contents of
the
slides
of all past meetings.
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Date
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Lectures
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Assignments & Notes
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Tue, Aug 24
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Lecture #1: Intro. & Digital Systems and
Binary Numbers (1)
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• Mano & Ciletti, Ch. 1.1
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Thu, Aug 26
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Lecture #2: Digital Systems and Binary Numbers
(2)
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• Mano & Ciletti, Ch. 1.2-1.5
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Tue, Aug 31
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Lecture #3: Digital Systems and Binary Numbers
(3)
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• Mano & Ciletti, Ch. 1.6, 1.7
•
Homework 1 out
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Thu, Sep 2
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Lecture #4: Digital Systems and Binary Numbers
(4)
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Tue, Sep 7
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Lecture #5: Boolean Algebra and Logic Gates (1)
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• Mano & Ciletti, Ch. 2.1-2.5
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Thu, Sep 9
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Lecture #6: Boolean Algebra and Logic Gates (2)
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•
Homework 1 due
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Tue, Sep 14
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Lecture #7: Boolean Algebra and Logic Gates (3)
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• Mano & Ciletti, Ch. 2.6
• Homework
2 out
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Thu, Sep 16
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Lecture #8: Boolean Algebra and Logic Gates (4)
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Tue, Sep 21
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Lecture #9: Gate-Level Minimization (1)
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• Mano & Ciletti, Ch. 3.3-3.5
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Thu, Sep 23
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Lecture #10: Gate-Level Minimization (2)
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• Mano & Ciletti, Ch. 3.6-3.8
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Tue, Sep 28
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Lecture #11: Gate-Level Minimization (3)
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•
Homework 2 due
•
Homework 3 out
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Thu, Sep 30
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Lecture #12: Gate-Level Minimization (4)
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Tue, Oct 5
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Lecture #13: Combinational Logic (1)
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• Mano & Ciletti, Ch. 4.4-4.7
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Thu, Oct 7
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Lecture #14: Combinational Logic (2)
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• Mano & Ciletti, Ch. 4.8-4.10
•
Homework 3 due
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Tue, Oct 12
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Lecture #15: Combinational Logic (3) & Review
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Thu, Oct 14
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Midterm Exam (in-class)
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Tue, Oct 19
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Lecture #16: Combinational Logic (4)
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•
Homework 4 out
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Thu, Oct 21
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Competitive Edge Day
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Tue, Oct 26
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Lecture #17: Synchronous Sequential Logic (1)
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• Mano & Ciletti, Ch. 5.2-5.3
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Thu, Oct 28
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Lecture #18: Synchronous Sequential Logic (2)
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• Mano & Ciletti, Ch. 5.4
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Tue, Nov 2
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Lecture #19: Synchronous Sequential Logic (3)
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• Mano & Ciletti, Ch. 5.6, 5.7
•
Homework 4 due
•
Homework 5 out
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Thu, Nov 4
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Lecture #20: Synchronous Sequential Logic (4)
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Tue, Nov 9
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Lecture #21: Registers and Counters (1)
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• Mano & Ciletti, Ch. 6.1, 6.2
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Thu,
Nov 11
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Veterans
Day – NO CLASSES
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Tue, Nov 16
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Lecture #22: Registers and Counters (2)
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• Mano & Ciletti, Ch. 6.3, 6.4
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Thu, Nov 18
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Lecture #23: Design at the Register Transfer
Level (1)
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• Mano & Ciletti, Ch. 8.2-8.4
• Homework 5 due
•
Homework 6 out
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Tue, Nov 23
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Lecture #24: Design at the Register Transfer
Level (2)
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• Mano & Ciletti, Ch. 8.5, 8.6
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Thu,
Nov 25
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Thanksgiving
Break – NO CLASSES
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Tue, Nov 30
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Lecture #25: Computer Design Basics (1)
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• Mano & Kime, Ch. 9.1-9.7
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Thu, Dec 2
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Lecture #26: Instruction Set Architecture (1)
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• Mano & Kime, Ch. 10.1-10.3
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Tue, Dec 7
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Lecture #27: Instruction Set Architecture (2)
& Review
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• Mano & Kime, Ch. 10.4-10.6
•
Homework 6 due
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Thu, Dec 9 (at 7:30am)
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Final Exam
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The slides and other materials for this course are in-part based upon the materials
from a number of people/sources, including:
·
Official website for the Mano & Ciletti
text: Digital
Design
·
Official website for the Mano & Kime text:
Logic and Computer Design
Fundamentals
·
Official website for the Patterson &
Hennessy text: Computer
Organization and Design: The Hardware/Software Interface
·
Mircea Nicolescu from UNR: http://www.cse.unr.edu/~mircea
·
Dwight Egbert from UNR: http://www.cse.unr.edu/~egbert
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Program Outcomes
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Course Outcomes
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Assessment Methods/Metrics
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Program Objectives Impacted
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1
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Students
are able to apply formal concepts (Boolean algebra, finite state machines)
to digital circuit design.
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Specific problems in
homework assignments and examinations.
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2
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3
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Students
are capable to design, implement and analyze combinational logic with digital
gates and sequential circuits with Flip-Flops.
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Specific problems in
homework assignments and examinations.
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2, 3
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5
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Students
are able to identify, formulate and solve engineering problems related to
the design of digital circuits.
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Specific
problems in homework assignments and examinations.
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1, 2
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11
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Students
are capable to use various techniques suited for the design of different
classes of digital circuits.
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Specific
problems in homework assignments and examinations.
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3
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Program
Outcomes:
1.
an ability to apply knowledge of computing,
mathematics, science, and engineering.
2.
an ability to design and conduct experiments, as well
as to analyze and interpret data.
3.
an ability to design, implement, and evaluate a
computer-based system, process, component, or program to meet desired needs,
within realistic constraints specific to the field.
4.
an ability to function effectively on
multi-disciplinary teams.
5.
an ability to analyze a problem, and identify,
formulate and use the appropriate computing and engineering requirements for
obtaining its solution.
6.
an understanding of professional, ethical, legal,
security and social issues and responsibilities.
7.
an ability to communicate effectively with a range of
audiences.
8.
the broad education necessary to analyze the local
and global impact of computing and engineering solutions on individuals,
organizations, and society.
9.
a recognition of the need for, and an ability to
engage in continuing professional development and life-long learning.
10.
a knowledge of contemporary issues.
11.
an ability to use current techniques, skills, and
tools necessary for computing and engineering practice.
12.
an ability to apply mathematical foundations,
algorithmic principles, and computer science and engineering theory in the
modeling and design of computer-based systems in a way that demonstrates
comprehension of the tradeoffs involved in design choices.
13.
an ability to apply design and development principles
in the construction of software systems or computer systems of varying
complexity.
Program
Objectives:
Within 3 to 5 years of graduation our graduates will:
1.
be employed as computer science and engineering
professionals beyond entry level positions or be making satisfactory progress
in graduate programs.
2.
have peer-recognized expertise together with the
ability to articulate that expertise as computer science and engineering
professionals.
3.
apply good analytic, design, and implementation
skills required to formulate and solve computer science and engineering
problems.
4.
demonstrate that they can function, communicate,
collaborate and continue to learn effectively as ethically and socially
responsible computer science and engineering professionals.
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