CPE 201 Introduction to Computer Engineering

Department of Computer Science & Engineering

University of Nevada, Reno, Fall 2011

Course Information - Description - Prerequisites - Textbooks - Syllabus - Organization - Grading - Schedule, Notes & Assignments - Acknowledgment - ABET Criteria

Course Information

Credits: 3.0
Lecture hours: Tuesday & Thursday, 11am - 12:15pm, SEM 234
Lab hours:

Section 1: Monday, 6-9pm, SEM 340
Section 2: Wednesday, 2-5pm, SEM 340
Section 3: Wednesday, 6-9pm, SEM 340
More information about the labs is available at the lab website.

Instructor: Murat Yuksel

E-mail: yuksem@cse.unr.edu

Phone: (775) 327-2246

Web page: http://www.cse.unr.edu/~yuksem

Office: SEM 237 (Scrugham Engineering-Mines)

Office hours:

Tuesday, 1-2pm
Wednesday, 11am-2pm
Thursday, 1-2pm
or by appointment

Teaching Assistant: Abdullah Sevincer

E-mail: asev@cse.unr.edu

Web page: http://www.cse.unr.edu/~asev

Office: SEM 323A

Office hours:

Monday, noon-1pm
Wednesday, 10-11am
or by appointment

Description

Fundamentals of digital design. Topics include: number bases, binary arithmetic, Boolean logic, minimizations, combinational and sequential circuits, registers, counters, memory, programmable logic devices, register transfer.

Prerequisites

CS 135 with a “C” or better. (BS-EE students are exempt from the “C” requirement.)

Textbooks

Required Textbooks

M. M. Mano and M. D. Ciletti. (2007) Digital Design, 4^th Edition. Prentice Hall. (ISBN: 0-13-198924-3)

Recommended Textbooks

M. M. Mano and C. R. Kime. (2008) Logic and Computer Design Fundamentals, 4^th Edition. Prentice Hall. (ISBN: 0-13-600158-0).
D. A. Patterson and J. L. Hennessy. (2008) Computer Organization and Design: The Hardware/Software Interface, 4^th Edition. Morgan Kaufmann. (ISBN: 978-0123744937)

Syllabus (Tentative)

This is a tentative list of topics, subject to modification and reorganization.

Digital Systems and Binary Numbers

Number representation systems and conversion
Binary numbers and arithmetic
Boolean logic

Boolean Algebra and Logic Gates

Boolean functions and operations
Axiomatic expression of Boolean logic
DeMorgan’s theorem
Logic gates
Minimization and minterms

Gate-Level Minimization

Simplification methods

§ The Map method

§ Products-of-Sums

Don’t care conditions
NAND and NOR gates

Combinational Logic

Analysis and design of logic circuits
Decoders
Encoders
Multiplexers

Synchronous Sequential Logic

Sequential circuits
Storage components

§ Latches

§ Flip-Flops

Clocked circuits
State reduction

Registers and Counters

Shift registers
Synchronous counters

Design at the Register Transfer Level (RTL)

RTL notation
HDL
Algorithmic State Machines (ASMs)
Controller and datapath design

Computer Design Basics

Datapaths
ALU
Control word
Instruction formats and specifications

Instruction Set Architecture

Register file
Instructions and operand processing
Addressing modes
Data transfer instructions
Data manipulation instructions

Organization

WebCT Except this web page, all course materials will be posted at the WebCT.
Labs There will be weekly lab sessions where you will have hands-on experience of the logic design concepts. The labs schedule and materials are available through the lab website.
Quizzes There will be a few in-class quizzes. Exact date for some of these quizzes will not be exposed beforehand. These quizzes will be extremely time-constrained, i.e., 15-30mins. The one with the lowest grade will not affect your overall grade.
Homework There will be homework assignments approximately one in every three weeks. The one with the lowest grade will not affect your overall grade.
Late policy Late assignments will be penalized according to the sliding scale below. If I am not available, slide your assignment under my office door or simply email it to me as a softcopy.
Exams There will be one midterm exam and one final exam (see Schedule for tentative dates).
Academic Integrity There will be no team projects or reports in this class, therefore all assignments and exams must be prepared strictly individually. Any form of cheating such as plagiarism or ghostwriting will incur a severe penalty, usually failure in the course. Please refer to the UNR policy on Academic Standards.
Disability Statement If you have a disability for which you will need to request accommodations, please contact the instructor or someone at the Disability Resource Center (Thompson Student Services - 107) as soon as possible.

Grading (Tentative)

Both grading policy and scale are subject to change.

• Grading Policy

Labs	20%
Quizzes	15%
Homework	15%
Midterm Exam	25%
Final Exam	25%

• Late Assignment Policy

less than 1 day late	25% deducted
between 1 and 2 days late	50% deducted
over 2 days late	100% deducted

• Grading Scale (Tentative)

90% - 100%	A-, A
80% - 89%	B-, B, B+
65% - 79%	C-, C, C+
55% - 64%	D
0% - 54%	F

Note: Saturdays and Sundays do not count toward missed days. For example, there is 1 "day" between Friday, 2pm and Monday, 2pm. Similarly, there is 1 day between Monday, 2pm and Tuesday, 2pm.

Important Note: Re-grading requests can only be made within the first week after the graded assignments/tests are returned to the students.

Schedule (Tentative), Notes & Assignments

This is a tentative schedule including the exam dates. It is subject to readjustment depending on the time we actually spend in class covering the topics. Slides presented in class and assignments will be posted at the WebCT. See the acknowledgment for the course materials. Permanent reading assignment: it is assumed that you are familiar with the contents of the slides of all past meetings.

Date	Lectures	Assignments & Notes
Tue, Aug 30	Lecture #1: Intro. & Digital Systems and Binary Numbers (1) – Number Base Representations	• Mano & Ciletti, Ch. 1.1, 1.2
Thu, Sep 1	Lecture #2: Digital Systems and Binary Numbers (2) – Number Conversions and Complements	• Mano & Ciletti, Ch. 1.3-1.5
Tue, Sep 6	Lecture #3: Digital Systems and Binary Numbers (3) – Binary Arithmetic and Encoding	• Mano & Ciletti, Ch. 1.6, 1.7 *• Homework 1 out*
Thu, Sep 8	Lecture #4: Boolean Algebra and Logic Gates (1) – Boolean Functions and Operations	• Mano & Ciletti, Ch. 2.1-2.2, 2.5, 2.8
Tue, Sep 13	Lecture #5: Boolean Algebra and Logic Gates (2) – Axiomatic Relations and Duality	• Mano & Ciletti, Ch. 2.3
Thu, Sep 15	Lecture #6: Boolean Algebra and Logic Gates (3) – Algebraic Manipulation, Minterms and Maxterms	• Mano & Ciletti, Ch. 2.4, 2.6 *• Homework 1 due* *• Homework 2 out*
Tue, Sep 20	Lecture #7: Boolean Algebra and Logic Gates (4) – NAND and NOR Gates	• Mano & Ciletti, Ch. 2.8
Thu, Sep 22	Lecture #8: Boolean Algebra and Logic Gates (5)
Tue, Sep 27	Lecture #9: Gate-Level Minimization (1) – K-maps	• Mano & Ciletti, Ch. 3.1-3.3
Thu, Sep 29	Lecture #10: Gate-Level Minimization (2) – Don’t Care Conditions	• Mano & Ciletti, Ch. 3.5, 3.6 *• Homework 2 due* *• Homework 3 out*
Tue, Oct 4	Lecture #11: Gate-Level Minimization (3) – NAND and NOR Implementations	• Mano & Ciletti, Ch. 3.7
Thu, Oct 6	Lecture #12: Gate-Level Minimization (4) – XOR, HDL	• Mano & Ciletti, Ch. 3.9, 3.10
Tue, Oct 11	Lecture #13: Combinational Logic (1) – Adders, Subtractors, Multipliers	• Mano & Ciletti, Ch. 4.1-4.7
Thu, Oct 13	Lecture #14: Combinational Logic (2) – Comparators, Decoders, Encoders	• Mano & Ciletti, Ch. 4.8-4.10
Tue, Oct 18	Lecture #15: Combinational Logic (3) – Multiplexers, HDL Models	• Mano & Ciletti, Ch. 4.11, 4.12 *• Homework 3 due* *• Homework 4 out*
Thu, Oct 20	Midterm Exam (in-class)
Tue, Oct 25	Lecture #16: Sequential Logic (1) – SR Latch	• Mano & Ciletti, Ch. 5.1-5.3
Thu, Oct 27	Lecture #17: Sequential Logic (2) – Flip-Flops	• Mano & Ciletti, Ch. 5.4 *• Homework 4 due*
Tue, Nov 1	Lecture #18: Sequential Logic (3) – Analysis of Sequential Circuits, State Tables, State Machines	• Mano & Ciletti, Ch. 5.5 *• Homework 5 out*
Thu, Nov 3	Lecture #19: Sequential Logic (4) – Controller Design, State Reduction	• Mano & Ciletti, Ch. 5.6, 5.7
Tue, Nov 8	Lecture #20: Sequential Logic (5) – Excitation Tables, Synthesis with Flip-Flops	• Mano & Ciletti, Ch. 5.8
Thu, Nov 10	Lecture #21: Registers and Counters (1) – Registers, Shift Registers, Register Design	• Mano & Ciletti, Ch. 6.1, 6.2
Tue, Nov 15	Lecture #22: Registers and Counters (2) – Counters, Ripple Counters, Synchronous Counters, Up/Down Counters	• Mano & Ciletti, Ch. 6.3-6.5 *• Homework 5 due* *• Homework 6 out*
Thu, Nov 17	Lecture #23: Register Transfer Level Design (1) – Datapath, Control	• Mano & Ciletti, Ch. 8.1-8.4
Tue, Nov 22	Lecture #24: Register Transfer Level Design (2) – Design Examples	• Mano & Ciletti, Ch. 8.5, 8.6
*Thu, Nov 24*	*Thanksgiving – NO CLASSES*
Tue, Nov 29	Lecture #25: Computer Design Basics – ALU, Control Word	• Mano & Kime, Ch. 9.1-9.6 *• Homework 6 due* *• Homework 7 out*
Thu, Dec 1	Lecture #26: Instruction Set Architecture (1) – Instruction Formats, PC, Instruction Execution	• Mano & Kime, Ch. 9.7, 9.8, 10.1
Tue, Dec 6	Lecture #27: Instruction Set Architecture (2) – MIPS	• Mano & Kime, Ch. 10.4-10.6
Thu, Dec 8	Lecture #28: Instruction Set Architecture (3) – MIPS	*• Homework 7 due*
Tue, Dec 13	Review
Thu, Dec 15 (at 8:00am)	Final Exam

Acknowledgment

The slides and other materials for this course are in-part based upon the materials from a number of people/sources, including:

· Official website for the Mano & Ciletti text: Digital Design

· Official website for the Mano & Kime text: Logic and Computer Design Fundamentals

· Official website for the Patterson & Hennessy text: Computer Organization and Design: The Hardware/Software Interface

· Mircea Nicolescu from UNR: http://www.cse.unr.edu/~mircea

· Dwight Egbert from UNR: http://www.cse.unr.edu/~egbert

ABET Criteria

Program Outcomes	Course Outcomes	Assessment Methods/Metrics	Program Objectives Impacted
1	Students are able to apply formal concepts (Boolean algebra, finite state machines) to digital circuit design.	Specific problems in homework assignments and examinations.	2
3	Students are capable to design, implement and analyze combinational logic with digital gates and sequential circuits with Flip-Flops.	Specific problems in homework assignments and examinations.	2, 3
5	Students are able to identify, formulate and solve engineering problems related to the design of digital circuits.	Specific problems in homework assignments and examinations.	1, 2
11	Students are capable to use various techniques suited for the design of different classes of digital circuits.	Specific problems in homework assignments and examinations.	3

Program Outcomes:

1. an ability to apply knowledge of computing, mathematics, science, and engineering.

2. an ability to design and conduct experiments, as well as to analyze and interpret data.

3. an ability to design, implement, and evaluate a computer-based system, process, component, or program to meet desired needs, within realistic constraints specific to the field.

4. an ability to function effectively on multi-disciplinary teams.

5. an ability to analyze a problem, and identify, formulate and use the appropriate computing and engineering requirements for obtaining its solution.

6. an understanding of professional, ethical, legal, security and social issues and responsibilities.

7. an ability to communicate effectively with a range of audiences.

8. the broad education necessary to analyze the local and global impact of computing and engineering solutions on individuals, organizations, and society.

9. a recognition of the need for, and an ability to engage in continuing professional development and life-long learning.

10. a knowledge of contemporary issues.

11. an ability to use current techniques, skills, and tools necessary for computing and engineering practice.

12. an ability to apply mathematical foundations, algorithmic principles, and computer science and engineering theory in the modeling and design of computer-based systems in a way that demonstrates comprehension of the tradeoffs involved in design choices.

13. an ability to apply design and development principles in the construction of software systems or computer systems of varying complexity.

Program Objectives:

Within 3 to 5 years of graduation our graduates will:

1. be employed as computer science and engineering professionals beyond entry level positions or be making satisfactory progress in graduate programs.

2. have peer-recognized expertise together with the ability to articulate that expertise as computer science and engineering professionals.

3. apply good analytic, design, and implementation skills required to formulate and solve computer science and engineering problems.

4. demonstrate that they can function, communicate, collaborate and continue to learn effectively as ethically and socially responsible computer science and engineering professionals.

Course Information - Description - Prerequisites - Textbooks - Syllabus - Organization - Grading - Schedule, Notes & Assignments - Acknowledgment - ABET Criteria

Last updated on October 31, 2011