{"id":576,"date":"2022-08-25T01:48:54","date_gmt":"2022-08-25T01:48:54","guid":{"rendered":"https:\/\/www.ece.ucf.edu\/labs\/EEL3123\/?page_id=576"},"modified":"2024-02-26T14:05:49","modified_gmt":"2024-02-26T14:05:49","slug":"project-3-circuit-design-2","status":"publish","type":"page","link":"https:\/\/www.ece.ucf.edu\/labs\/EEL3123\/projects\/project-3-circuit-design-2\/","title":{"rendered":"Project #5 Circuit Design #2"},"content":{"rendered":"<h2>Objectives<\/h2>\n<p>The ultimate goal of the project is to design a circuit that meets certain design requirements.<\/p>\n<h2>Tools<\/h2>\n<ul>\n<li>Lab Equipment<\/li>\n<li>Circuit Simulator<\/li>\n<li>Hantek 3-in-1 Digital Equipment<\/li>\n<li>Powered Breadboard<\/li>\n<\/ul>\n<h2>Assessment<\/h2>\n<p>The overall weighted grading scheme is as follows:<\/p>\n<p style=\"text-align: center;\"><strong>Table 1\u00a0 \u00a0 \u00a0Overall Weighted Grading Scheme<\/strong><\/p>\n\n<table id=\"tablepress-4\" class=\"tablepress tablepress-id-4\">\n<thead>\n<tr class=\"row-1\">\n\t<th class=\"column-1\">Category<\/th><th class=\"column-2\">Percent of Overall Grade<\/th>\n<\/tr>\n<\/thead>\n<tbody class=\"row-striping row-hover\">\n<tr class=\"row-2\">\n\t<td class=\"column-1\">Circuit Design<\/td><td class=\"column-2\">45%<\/td>\n<\/tr>\n<tr class=\"row-3\">\n\t<td class=\"column-1\">Demo<\/td><td class=\"column-2\">15%<\/td>\n<\/tr>\n<tr class=\"row-4\">\n\t<td class=\"column-1\">Report<\/td><td class=\"column-2\">40%<\/td>\n<\/tr>\n<tr class=\"row-5\">\n\t<td class=\"column-1\">Total<\/td><td class=\"column-2\">100%<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<!-- #tablepress-4 from cache -->\n<h3>I. Circuit Design and Demo<\/h3>\n<p><img loading=\"lazy\" decoding=\"async\" class=\"wp-image-231 aligncenter size-full\" src=\"https:\/\/www.ece.ucf.edu\/labs\/EEL3123\/wp-content\/uploads\/2022\/11\/Project2A.png\" alt=\"\" width=\"550\" height=\"180\" \/><\/p>\n<p style=\"text-align: center;\"><strong>Figure 1\u00a0 \u00a0 \u00a0Single-Input Single-Output (SISO) System<\/strong><\/p>\n<p>Figure 1 shows a single-input single-output (SISO) system considered in this project. In the system, a function generator acts as the input while the output is a variable load. As shown in Figure 2, the function generator can be modeled by an independent voltage source connected in series with a resistor while the variable load is modeled using a resistor with variable resistance.<\/p>\n<p><img loading=\"lazy\" decoding=\"async\" class=\"wp-image-231 aligncenter size-full\" src=\"https:\/\/www.ece.ucf.edu\/labs\/EEL3123\/wp-content\/uploads\/2022\/11\/Project2B.png\" alt=\"\" width=\"550\" height=\"180\" \/><\/p>\n<p style=\"text-align: center;\"><strong>Figure 2\u00a0 \u00a0 \u00a0Circuit Model<\/strong><\/p>\n<p>Each of the five notations used in Figure 2 represents a physical quantity. The representations are described in the following list.<\/p>\n<p style=\"padding-left: 40px;\">V<sub>IS<\/sub> \u2212 input signal voltage<br \/>\nV<sub>IF<\/sub> \u2212 input voltage to the designed circuit<br \/>\nV<sub>O<\/sub> \u2212 output voltage<br \/>\nR<sub>S<\/sub> \u2212 output impedance of a function generator with a typical value of 50\u2126<br \/>\nR<sub>L<\/sub> \u2212 variable load with resistance in the range of <span class=\"katex-eq\" data-katex-display=\"false\"> R_{MIN} \\le R_L \\le R_{MAX} <\/span><\/p>\n<p>In this project, your group has been tasked by Chanos to design a circuit that meets certain design requirements and specifications. The tasks required to be completed are as follows:<\/p>\n<ul>\n<li>Design ONE circuit that will satisfy all the design specifications detailed in Table 2.<\/li>\n<li>The ONE circuit that you design must work for the entire range of R<sub>L<\/sub> specified in Table 2.<\/li>\n<li>Demonstrate both simulation and experimental results of your designed circuit on the spot to your Lab TA. Provide detailed explanations and reasonings on how you have obtained the results during your demo.<\/li>\n<li>Record down your results for the writing of your report.<\/li>\n<\/ul>\n<p>The following table contains the set of specifications that your designed circuit has to meet.<\/p>\n<p style=\"text-align: center;\"><strong>Table 2\u00a0 \u00a0 \u00a0Design Specifications<\/strong><\/p>\n\n<table id=\"tablepress-5\" class=\"tablepress tablepress-id-5\">\n<thead>\n<tr class=\"row-1\">\n\t<th class=\"column-1\">Lab Section<\/th><th class=\"column-2\">Design Specification<\/th>\n<\/tr>\n<\/thead>\n<tbody class=\"row-striping row-hover\">\n<tr class=\"row-2\">\n\t<td class=\"column-1\">EEL 3123C-11<\/td><td class=\"column-2\"><a href=\"https:\/\/www.ece.ucf.edu\/labs\/EEL3123\/wp-content\/uploads\/2023\/02\/Project-64A.pdf\">Project A<\/a><\/td>\n<\/tr>\n<tr class=\"row-3\">\n\t<td class=\"column-1\">EEL 3123C-12<\/td><td class=\"column-2\"><a href=\"https:\/\/www.ece.ucf.edu\/labs\/EEL3123\/wp-content\/uploads\/2023\/02\/Project-64C.pdf\">Project C<\/a><\/td>\n<\/tr>\n<tr class=\"row-4\">\n\t<td class=\"column-1\">EEL 3123C-13<\/td><td class=\"column-2\"><a href=\"https:\/\/www.ece.ucf.edu\/labs\/EEL3123\/wp-content\/uploads\/2023\/02\/Project-64D.pdf\">Project D<\/a><\/td>\n<\/tr>\n<tr class=\"row-5\">\n\t<td class=\"column-1\">EEL 3123C-14<\/td><td class=\"column-2\"><a href=\"https:\/\/www.ece.ucf.edu\/labs\/EEL3123\/wp-content\/uploads\/2023\/02\/Project-64E.pdf\">Project E<\/a><\/td>\n<\/tr>\n<tr class=\"row-6\">\n\t<td class=\"column-1\">EEL 3123C-15<\/td><td class=\"column-2\"><a href=\"https:\/\/www.ece.ucf.edu\/labs\/EEL3123\/wp-content\/uploads\/2023\/02\/Project-64F.pdf\">Project F<\/a><\/td>\n<\/tr>\n<tr class=\"row-7\">\n\t<td class=\"column-1\">EEL 3123C-16<\/td><td class=\"column-2\"><a href=\"https:\/\/www.ece.ucf.edu\/labs\/EEL3123\/wp-content\/uploads\/2023\/02\/Project-64B.pdf\">Project B<\/a><\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<!-- #tablepress-5 from cache -->\n<p>The grades earned in this part depend highly on your ability to complete the above tasks. The weighted grading scheme is as follows:<\/p>\n<p style=\"text-align: center;\"><strong>Table 3\u00a0 \u00a0 \u00a0Weighted Grading Scheme for Circuit Design and Demo<\/strong><\/p>\n\n<table id=\"tablepress-6\" class=\"tablepress tablepress-id-6\">\n<thead>\n<tr class=\"row-1\">\n\t<th class=\"column-1\">Category<\/th><th class=\"column-2\">Percent of Overall Grade<\/th>\n<\/tr>\n<\/thead>\n<tbody class=\"row-striping row-hover\">\n<tr class=\"row-2\">\n\t<td class=\"column-1\">Simulation Results and Achievement<\/td><td class=\"column-2\">10%<\/td>\n<\/tr>\n<tr class=\"row-3\">\n\t<td class=\"column-1\">Experimental Results and Achievement<\/td><td class=\"column-2\">35%<\/td>\n<\/tr>\n<tr class=\"row-4\">\n\t<td class=\"column-1\">Simulation Demonstration and Elaboration<\/td><td class=\"column-2\">5%<\/td>\n<\/tr>\n<tr class=\"row-5\">\n\t<td class=\"column-1\">Experimental Demonstration and Elaboration<\/td><td class=\"column-2\">10%<\/td>\n<\/tr>\n<tr class=\"row-6\">\n\t<td class=\"column-1\">Total<\/td><td class=\"column-2\">60%<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<!-- #tablepress-6 from cache -->\n<p><strong>IMPORTANT NOTES:<\/strong><\/p>\n<ul>\n<li><strong>DO NOT blindly play around with component values using a circuit simulator in the hope that you will discover a working design. Even if you somehow manage to discover a working design magically, you will still lose substantial points in this project since you won&#8217;t be able to dissect your circuit design in your report using circuit theory, calculations, etc.<\/strong><\/li>\n<li>Collaborations between any groups are strictly prohibited in this project.<\/li>\n<li>All project demonstrations must be performed during a lab session. No project demonstration can be performed outside lab session.<\/li>\n<li>All groups will be given only <strong>ONE<\/strong> lab session to demonstrate a working design on the spot.<\/li>\n<li><strong>HEADS UP:<\/strong> It is impossible to complete all the required tasks in this project in a 2-hour lab session. To prepare fully for your project execution and demonstration, you are highly encouraged to perform circuit simulations and experiments at home so that you can figure out a working design for your project. To perform experiments outside of the laboratory, you can loan out a Hantek 3-in-1 digital equipment and a powered breadboard. You can also acquire circuit components from the laboratory, and they are not required to be returned.<\/li>\n<li><strong>SUGGESTION:<\/strong> You are strongly encouraged to complete the following tasks prior to your lab session.\n<ul>\n<li>Perform all simulation work.<\/li>\n<li>Build, test and verify the functionality of your designed circuit using the Hantek 3-in-1 digital equipment and powered breadboard you have loaned out.<\/li>\n<\/ul>\n<p>If you have completed all of the above tasks in advance, all you have to do during your lab session is to connect the instruments in the laboratory to the constructed circuit on the loaned breadboard and perform your demo. In this case, you can literally walk out of your lab session with a great sense of accomplishment in 30 minutes.<\/li>\n<\/ul>\n<p><strong>TECHNICAL NOTES:<\/strong><\/p>\n<ul>\n<li>The use of op-amp is strictly prohibited in this project.<\/li>\n<li>If you use an inductor, you ought to measure its resistance using a DMM. Record down the measured value and incorporate this non-ideal factor, specifically the DC resistance (DCR) value of an inductor into your analysis. <strong>Welcome to the real world!<\/strong><\/li>\n<\/ul>\n<h3>II. Report<\/h3>\n<p>Document all your analysis, results and findings in a report. The content of your report should include, but not limited to, the following sections.<\/p>\n<ul>\n<li>Objectives and Tasks\u00a0\u2013 define and outline explicitly the objectives and tasks<\/li>\n<li style=\"text-align: left;\">Dissection of Design \u2013 present your circuit design in a detailed, part-by-part analysis\n<div style=\"white-space: pre;\">                                      \u2013 explain the reasonings behind your circuit design using circuit theory<\/div>\n<div style=\"white-space: pre;\">                                      \u2013 provide detailed circuit analysis and calculation to justify the circuit topology,<\/div>\n<div style=\"white-space: pre;\">                                         component type and component value used in your design<\/div>\n<\/li>\n<li>Simulation Results \u2013 present your simulation results with clarity\n<div style=\"white-space: pre;\">                                   \u2013 include screenshots of simulated circuits, results, etc.<\/div>\n<\/li>\n<li>Experimental Results \u2013 present your experimental results with clarity\n<div style=\"white-space: pre;\">                                       \u2013 include oscilloscope figures, screenshots of DMM measurements, etc.<\/div>\n<\/li>\n<li>Results Comparison \u2013 compare simulation and experimental results\n<div style=\"white-space: pre;\">                                     \u2013 explain discrepancies pertaining to concepts<\/div>\n<\/li>\n<li>Conclusions<\/li>\n<\/ul>\n<p>The weighted grading scheme is as follows:<\/p>\n<p style=\"text-align: center;\"><strong>Table 4\u00a0 \u00a0 \u00a0Weighted Grading Scheme for Report<\/strong><\/p>\n\n<table id=\"tablepress-7\" class=\"tablepress tablepress-id-7\">\n<thead>\n<tr class=\"row-1\">\n\t<th class=\"column-1\">Category<\/th><th class=\"column-2\">Percent of Overall Grade<\/th>\n<\/tr>\n<\/thead>\n<tbody class=\"row-striping row-hover\">\n<tr class=\"row-2\">\n\t<td class=\"column-1\">Objectives and Tasks<\/td><td class=\"column-2\">2.5%<\/td>\n<\/tr>\n<tr class=\"row-3\">\n\t<td class=\"column-1\">Dissection of Design<\/td><td class=\"column-2\">25.0%<\/td>\n<\/tr>\n<tr class=\"row-4\">\n\t<td class=\"column-1\">Simulation Results<\/td><td class=\"column-2\">2.5%<\/td>\n<\/tr>\n<tr class=\"row-5\">\n\t<td class=\"column-1\">Experimental Results<\/td><td class=\"column-2\">2.5%<\/td>\n<\/tr>\n<tr class=\"row-6\">\n\t<td class=\"column-1\">Results Comparison<\/td><td class=\"column-2\">5.0%<\/td>\n<\/tr>\n<tr class=\"row-7\">\n\t<td class=\"column-1\">Conclusions<\/td><td class=\"column-2\">2.5%<\/td>\n<\/tr>\n<tr class=\"row-8\">\n\t<td class=\"column-1\">Total<\/td><td class=\"column-2\">40%<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<!-- #tablepress-7 from cache -->\n<p><strong>IMPORTANT NOTES:<\/strong><\/p>\n<ul>\n<li>The dissection of design is a very critical part in your report. You will lose substantial points if you fail to provide detailed circuit analysis and calculation to explain the reasonings behind your circuit design.<\/li>\n<\/ul>\n","protected":false},"excerpt":{"rendered":"<p>Objectives The ultimate goal of the project is to design a circuit that meets certain design requirements. Tools Lab Equipment &hellip; <a href=\"https:\/\/www.ece.ucf.edu\/labs\/EEL3123\/projects\/project-3-circuit-design-2\/\" class=\"more-link\">Continue reading <span class=\"screen-reader-text\">Project #5 Circuit Design #2<\/span><\/a><\/p>\n","protected":false},"author":2,"featured_media":0,"parent":566,"menu_order":8,"comment_status":"closed","ping_status":"closed","template":"","meta":{"footnotes":""},"class_list":["post-576","page","type-page","status-publish","hentry"],"_links":{"self":[{"href":"https:\/\/www.ece.ucf.edu\/labs\/EEL3123\/wp-json\/wp\/v2\/pages\/576","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.ece.ucf.edu\/labs\/EEL3123\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/www.ece.ucf.edu\/labs\/EEL3123\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/www.ece.ucf.edu\/labs\/EEL3123\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/www.ece.ucf.edu\/labs\/EEL3123\/wp-json\/wp\/v2\/comments?post=576"}],"version-history":[{"count":124,"href":"https:\/\/www.ece.ucf.edu\/labs\/EEL3123\/wp-json\/wp\/v2\/pages\/576\/revisions"}],"predecessor-version":[{"id":1289,"href":"https:\/\/www.ece.ucf.edu\/labs\/EEL3123\/wp-json\/wp\/v2\/pages\/576\/revisions\/1289"}],"up":[{"embeddable":true,"href":"https:\/\/www.ece.ucf.edu\/labs\/EEL3123\/wp-json\/wp\/v2\/pages\/566"}],"wp:attachment":[{"href":"https:\/\/www.ece.ucf.edu\/labs\/EEL3123\/wp-json\/wp\/v2\/media?parent=576"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}