{"id":979,"date":"2023-03-06T16:11:07","date_gmt":"2023-03-06T16:11:07","guid":{"rendered":"https:\/\/www.ece.ucf.edu\/labs\/EEL3123\/?page_id=979"},"modified":"2024-01-24T00:12:29","modified_gmt":"2024-01-24T00:12:29","slug":"circuit-design-part-b","status":"publish","type":"page","link":"https:\/\/www.ece.ucf.edu\/labs\/EEL3123\/projects\/circuit-design-part-b\/","title":{"rendered":"Circuit Design Part B"},"content":{"rendered":"
\"\"
Figure 2 Circuit Design Part B<\/strong><\/figcaption><\/figure>\n

Figure 2 shows that the Circuit A designed in Part A is cascaded with the Circuit B designed in Part A.
\nSince VIB<\/sub> = VOA<\/sub>, is VOB<\/sub> = KA<\/sub>\u00d7KB<\/sub>\u00d7VIA<\/sub>? The answer is ‘NO’! WHY?<\/p>\n

Do the following parts.<\/p>\n

    \n
  1. Verify the answer ‘NO’ using a circuit simulator. Include your simulation results in your report.<\/li>\n
  2. Explain why the answer is ‘NO’. Provide detailed reasonings in your report using circuit theory, calculations, etc.<\/li>\n<\/ol>\n

    REDESIGN<\/strong> Circuit A and\/or Circuit B to meet the following design requirements while satisfying the design constraints below.<\/p>\n

    Design Requirement<\/h5>\n
      \n
    1. In the cascaded circuit, VOA<\/sub> = KA<\/sub>\u00d7VIA<\/sub>. KA<\/sub> is the same value given in Table 2 in Circuit Design Part A<\/a>.<\/li>\n
    2. In the cascaded circuit, VOB<\/sub> = KB<\/sub>\u00d7VIB<\/sub>. KB<\/sub> is the same value given in Table 2 in Circuit Design Part A<\/a>.<\/li>\n
    3. In the cascaded circuit, VOB<\/sub> = KA<\/sub>\u00d7KB<\/sub>\u00d7VIA<\/sub>.<\/li>\n<\/ol>\n
      Design Constraint<\/h5>\n
        \n
      1. You are allowed to use resistors with resistances within the range of 100 \u2126 to 400 k\u2126 only. Refer to APPENDIX II for available resistors.<\/li>\n
      2. Use as FEWEST components as possible.<\/li>\n<\/ol>\n","protected":false},"excerpt":{"rendered":"

        Figure 2 shows that the Circuit A designed in Part A is cascaded with the Circuit B designed in Part … Continue reading Circuit Design Part B<\/span><\/a><\/p>\n","protected":false},"author":2,"featured_media":0,"parent":566,"menu_order":5,"comment_status":"closed","ping_status":"closed","template":"","meta":{"footnotes":""},"class_list":["post-979","page","type-page","status-publish","hentry"],"_links":{"self":[{"href":"https:\/\/www.ece.ucf.edu\/labs\/EEL3123\/wp-json\/wp\/v2\/pages\/979","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.ece.ucf.edu\/labs\/EEL3123\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/www.ece.ucf.edu\/labs\/EEL3123\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/www.ece.ucf.edu\/labs\/EEL3123\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/www.ece.ucf.edu\/labs\/EEL3123\/wp-json\/wp\/v2\/comments?post=979"}],"version-history":[{"count":14,"href":"https:\/\/www.ece.ucf.edu\/labs\/EEL3123\/wp-json\/wp\/v2\/pages\/979\/revisions"}],"predecessor-version":[{"id":1277,"href":"https:\/\/www.ece.ucf.edu\/labs\/EEL3123\/wp-json\/wp\/v2\/pages\/979\/revisions\/1277"}],"up":[{"embeddable":true,"href":"https:\/\/www.ece.ucf.edu\/labs\/EEL3123\/wp-json\/wp\/v2\/pages\/566"}],"wp:attachment":[{"href":"https:\/\/www.ece.ucf.edu\/labs\/EEL3123\/wp-json\/wp\/v2\/media?parent=979"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}