% !TEX root = master.tex
\subsubsection{MSP430G2553}

\begin{table}[!ht]
	\centering
	\caption[MSP430G2553 Basic Specifications]{MSP430G2553 Basic Specifications \cite{micMSP430G2553}}
	\label{tab:msp430g2553}
	\begin{tabularx}{\textwidth}{|X|X|X|}
		\hline
		\textbf{Specification} & \textbf{Value} & \textbf{Summary of Interest}\\ 
		\hline\hline 
		Main Clock Speed & 16MHZ & Basic modern speed, average \\ 
		\hline 
		Primary Storage & 512B & Will have to hyper optimize access \\ 
		\hline 
		Secondary Storage & 16KB & Basic amount needed for semi complex code  \\ 
		\hline 
		Communication Module & USCI & Standard communication (SPI) support \\
		\hline
		Clock System & Watch Crystal, Internal Programmable, External Source & Allows finer control over clock speed matching \\ 
		\hline 
	\end{tabularx} 
\end{table}

 The MSP430G2553 microcontroller is part of Texas Instrument's value line series using the MSP430 core. In particular this is their most powerful offering, that at the time of this paper being written, is available and contains the capability of being slotted into the basic launchpad for the value line. As such a device fits into a main requirement of the group, which is to bring down the total cost of the project, it was the first microcontroller to come under consideration. Also additionally all group members have have previous experience with TI's msp430 cores and as such it was a massive incentive to continue the project's focus onto this line. The main features that come into consideration for this part are: low overall power draw, a simple instruction set, an internal watch crystal, the ability to use external clocks, a max stable clock speed of 16 MHz, dual timer modules each with three capture/compare registers, multiple I/O pins, a USCI module which includes UART, SPI, I2C capabilities, an on-board ADC, and finally easy programming access with a JTAG interface.

 As this is an msp430 based microcontroller, low power is the main advertisement and draw of these devices, as their overall power draw is exceptionally low with a draw in the milliwatt range when in it's power saving mode. This though requires careful consideration from the programmer to implement this properly, as the device has to be configured properly to go into low power mode and to exit it properly as the clock sources for certain devices can become unstable and cause undefined behavior. Despite this additional cost to the programmer, the trade-off of exceptional low power performance is something to pursue in embedded device design. To help aid in reducing the load on the programmer, the msp430 line has excellent documentation and a well defined instruction set which massively aids in software development for the microcontroller. Additionally the programmer, if using the TI provided header files, has easy access to defined macros and functions to help control the microcontroller more effectively without having to resort to writing in pure assembly language. Additionally also provided is sample source code to use as reference material, from TI for general usage.
 
 The clock system for the msp430 line is in general a very robust system. In this line within the overarching family, the clock system allows for multiple sources to be used and/or configured in  the aggregate of instances which a clock is used as an input. In this particular device, a main system clock is used to generate the clock signals used throughout the device. The clock speeds of this device are configurable using presets, to set it certain predefined speeds which are proven stable by Texas Instruments. The presets allowing the programmer to set the speed up to an impressive 16 MHz, impressive for such a low power device with its capabilities. To boot this device comes with the ubiquitous 32kHz watch crystal, a long standing standard used across a multitude of devices due to its ease of production, stability, and most importantly the ability to be cleanly divisible by two. Additionally this crystal is the core to the low power mode, if you still need peripherals to run without the main clock running. The most interesting feature of this clock system, in terms of potential, is its inclusion of the ability to use external clocks for clocking its systems. Therefore if a specific speed was needed, a certain precision, or power draw requirement was needed to be met, an external piece of hardware could be used to provide in this instance; this leads to an incredible amount of freedom and customization of the hardware for the needs of the customer and/or company using this device.
 
 The timer module built into this device are exceptionally useful for a multitude of tasks. They can be used for a variety of tasks such as implementing PWM without a computational costly method of direct processor intervention. The module itself runs off a configurable clock source, then contains multiple registers inside it to track the number of clock cycles counting and trigger events depending on the configuration of the timer module itself. Additionally each register can trigger a interrupt event in which a temporary halt to the main code is caused, or even possibly a wake up from low power mode can trigger. This ability is core to efficient CPU cycle usage which is absolutely a hard line issue that must be considered in such low power devices. The modes also offered by the module for triggering are highly customizable and offer interesting methods of control depending on the application. For example, the following code was developed as a proof of concept for using the timer module on an msp430 device to generate PWM code for controlling a servo, a very useful and realistic device to interface with in a common scenario.  
 
 \begin{figure}[!htb]
 	\centering
 	\includegraphics[width=0.7\linewidth]{img/flowchartpoop/PWMControl}
 	\caption[PWM Basics]{Flowchart of basic PWM control}
 	\label{fig:PWMControl1}
 	\includegraphics[width=0.8\linewidth]{img/flowchartpoop/PWMControl2}
 	\caption[PWM Example]{PWM example, demonstrating duty cycles generated from a timer module}
 	\label{fig:PWMControl2}
 \end{figure}

 As demonstrated in \ref{fig:PWMControl1} and \ref{fig:PWMControl2}, the implementation of PWM is relatively straightforward due to the usage of a timer module, and computationally inexpensive.
 
 The Universal Serial Communication Interface (USCI) module that is included within the device, is an exceedingly useful hardware add-on that allows for easier low level communication protocols to be implemented in hardware rather than in software thus additionally saving on costly clock cycles which can be redirected onto other tasks. This module in particular gives access to the ability to offload UART and SPI primarily with partial support for I2C. Both main protocols are costly to implement in software, especially UART due to its very nature of a asynchronous communications protocol. The core reasoning behind the requirement of the USCI module is due to the need for the Smart Table project's further integration with a wireless communication module. As such, modules tend to use one of these protocols in the data transmission between it and another device. Considerations also have to be taken, as USCI is a generic term within TI documentation and does not indicate its true functions, i.e. most other devices in the value series only support SPI and I2C in their USCI module.
 
 Ease of prototyping code is an additional draw to this particular device. As the IC fits within the socket provided by the value line launchpad and is supported, the MSP430G2553 is immediately available for prototype use. Then further down the road, in the final production phase, the inclusion of onboard JTAG is a low cost addition to the board and allows for on the fly code tweaking if required in the late stages. While considering all the advantages this chip offers, it was finally discarded due to the issue of memory. The amount of onboard memory is only 16KB and offers 512B of ram; while this is a massive amount of resources for most projects, the Smart Table has the problem of requiring a large amount of data that must be readily available for smooth operation. Additionally more is needed for further possible upgrades at a later date. The cost of swapping a microcontroller at a later date is much higher than the inital cost of using a more expensive microcontroller. Thus this chip was passed on after intensive investigation period. \cite{micMSP430G2553}