Department of Electrical Engineering & Computer Science
Department of Electrical Engineering & Computer Science

Rickard Ewetz


JOURNAL PUBLICATIONS
 
  1. R. Ewetz and C-K. Koh., "Fast Clock Scheduling and an Application to Clock Tree Synthesis", Integration, the VLSI Journal, 56:115-127, January 2017.
  2. R. Ewetz and C-K. Koh., "Construction of Reconfigurable Clock Trees for MCMM Designs using Mode Separation and Scenario Compression", in ACM Trans. on Design Automation of Electronic Systems (ACM), 21(4):57-83, June 2016.
  3. R. Ewetz and C-K. Koh., “Cost-Effective Robustness in Clock Networks Using Near-Tree Structures”, in IEEE Trans. on Computer-aided Design of Integrated Circuits and Systems (TCAD), 34(4):515-528, January 2015.


CONFERENCE PUBLICATIONS
 
  1. Necati Uysal and R. Ewetz, "OCV Guided Clock Tree Topology Reconstruction”, Asia and South Pacific Design Automation Conference (ASP-DAC), Korea, Jan. 22-25, 2018. (accepted)
  2. C. Tan, R. Ewetz, and C-K. Koh, "Clustering of Flip-Flops for Useful-Skew Clock Tree Synthesis”, Asia and South Pacific Design Automation Conference (ASP-DAC), Korea, Jan. 22-25, 2018. (accepted)
  3. R. Ewetz, “A Clock Tree Optimization Framework with Predictable Timing Quality”, Design Automation Conference (DAC), Austin, TX, June. 19-22, 2017.
  4. R. Ewetz and C-K. Koh, “Clock Tree Construction based on Arrival Time Constraints”, International Symposium on Physical Design (ISPD), Portland, OR, March. 19-22, 2017.
  5. S. Han, W.-H Liu, R. Ewetz, C.-K Koh, K.-Y Chao, and T.-C Wang, “Delay-driven Layer Assignment for Advanced Technology Nodes”, Asia and South Pacific Design Automation Conference (ASP-DAC), 2017.
  6. R. Ewetz, C. Tan, and C-K. Koh, “Construction of Latency-Bounded Clock Trees”, International Symposium on Physical Design (ISPD), Santa Rosa, CA, Apr. 3-6, 2016
  7. R. Ewetz and C-K. Koh, “MCMM Clock Tree Optimization based on Slack Redistribution Using a Reduced Slack Graph”, Asia and South Pacific Design Automation Conference (ASP-DAC), Macau, Macau, Jan. 25-28, 2016
  8. R. Ewetz, S. Janarthanan, and C-K. Koh, “Construction of Reconfigurable Clock Trees for MCMM Designs”, Design Automation Conference (DAC), San Francisco, CA, Jun. 7-11, 2015
  9. R. Ewetz and C-K. Koh, “Useful Skew Tree Framework for Inserting Large Safety Margins”, International Symposium on Physical Design (ISPD), Monterey, CA, Mar. 7- Apr. 1, 2015
  10. R Ewetz, S. Janarthanan, and C.-K Koh., “Fast Clock Skew Scheduling based on Sparse-Graph Algorithms”, Asia and South Pacific Design Automation Conference (ASP-DAC), Chiba/Tokyo, Japan, Jan. 25-28, 2015
  11. R. Ewetz, A. Udupa G. Subbarayan, and C.-Kok Koh., “A TSV-cross-link-based approach to 3D-Clock Network Synthesis for Improved Robustness”, ACM Great Lakes Symposium on VLSI (GLS- VLSI), Huston, US, May 21-23, 2014.
  12. R. Ewetz, W.-H Liu, K.-Y Chao, T.-C Wang, and C.-K Koh., “A Study on the use of Parallel Wiring Techniques for Sub-20nm Designs”, ACM Great Lakes Symposium on VLSI (GLS-VLSI), Huston, US, May 21-23, 2014.
  13. R. Ewetz and C.-K Koh., “Local Merges for Effective Redundancy in Clock Networks”, International Symposium on Physical Design (ISPD), Lake Tahoe, US, Jun. 24-27, 2013.


University of Central Florida