Dr. Wen-Kuan Yeh
National University of Kaohsiung
Thursday, July 20, 2017
4:00PM – BA1 116
Abstract
As MOSFETs are scaled down to 7nm and below, power consumption is the major limitation to maintain device performance well. Thus, how to suppress the device’s sub-threshold leakage and gate tunneling current is the key issue for sub-10nm MOSFETs, especially for high performance and lower power systems. In order to scale MOS transistors following Moore’s law continuously, FinFETs, GAA transistors, and 2D material FETs are introduced to replace conventional MOS transistors. In this talk, Professor W. K. Yeh will explain nano-device trends and related advanced technologies, especially in the 7nm technology node regime. Other devices beyond more than Moore applications including sensor, energy harvesting, and monolithic integrated circuits for Internet on Things (IoT) will be also explained.
Biography
Wen-Kuan Yeh was born in Hsinchu, Taiwan in 1964. He received his Ph.D. in electronics engineering from National Chiao-Tung University, Taiwan in 1996. In 1989-90, he worked at Taiwan Semiconductor Manufacturing Corporation (TSMC) R&D Division, as a Research Intern on submicron CMOS FETs. During 1996 to 2000 he joined Unite Microelectronic Corporation (UMC), Technology & Process Development Division as a Research Scientist. He is currently a full Professor of Electrical Engineering at the National University of Kaohsiung and the General Director of National Nano-Device laboratories (NDL), a leading government lab in Taiwan. He also serves as the Chair of IEEE EDS Tainan Chapter. Dr. Yeh has published 5 edited books, 3 book chapters, more than 100 peer reviewed papers, and holds 100 patents. His recent work focuses on nano-scale FETs, SOI FETs, and 3D FETs.